The link between the TXT and the FPGA is the standard I2C line. All communication is done through this channel. On the FPGA side, I had to implement an I2C slave. This allows all commands and parameters to be sent back and forth. Along the FPGA side, I provided 512x8 read and 512x8 write registers.
They are arranged in 16x32 blocks and have an address range on the I2C between $60 and $6F. The FPGA can use all registers simultaneously. Commands such as motor control are then executed in the FPGA. For this I also had to write a module. If you have several motors then you use several of those hardware modules. In the FPGA there are 15,880 Logic utilization (in ALMs) and a full motor controller that can work in 4 modes also with quadrature encoders, end switches, home point, calibration etc consume about 230 ALMs per module. You see there is a lot that can go into an FPGA. I currently have 12 Motors inserted but there is no limit to increase this to any number. They may all work simultaneously of course and the motor control is in there. Same story for the servos. I now have 24 provided. For the Neopixel LEDs, I also wrote a driver. There, 2 output strings are provided and each drive 128 LEDs. Again, there is no limitation to drive more leds.
I also have a built-in LCD display of 4x20 char. There I can read the most important values in real time. I now have 120 inputs through 5 spi lines. The status of all 120 inputs can be read in real time. Also 8 analog inputs each 12 bit can be read out on the display and the TXT. With a rotary encoder on the front plate I can view the different LCD pages. I have an old IR remote control that has 40 keys on it. This is also readout continuously and when a new key is pressed the value comes into the output register. This value is also on the LCD but can also be read by the TXT.
The FPGA itself has 2.7 Mbit of ram internally that you can use freely. I regularly use this to make dual ported ram. Then multiple tasks can apply and read data simultaneously. You see you have huge power, lots of I/O pins and all real time without mutual influence for execution speed.
The status of the FPGA is now:
Logic utilization (in ALMs) 5,321 / 15,880 ( 34 % )
Total registers 5111
Total pins 110 / 314 ( 35 % )
Total block memory bits 38,528 / 2,764,800 ( 1 % )
Total DSP Blocks 0 / 84 ( 0 % )
Total PLLs 1 / 5 ( 20 % )
Total DLLs 0 / 4 ( 0 % )
In fact, I underuse the FPGA. It has to do very little effort. Nowhere really highspeed is used. The highest clock is 20 MHz.
I have now started to write the driver for the flash spi module. If you just use the regular spi mode it doesn't look that difficult. There are of course a series of functions that you have to implement. But it will work.
The only documentation I have is my Flickr web. That's where I regularly document all my tests. You can also find the hardware there. But everything is pretty much scattered around. It's more like a Journal. I use it myself to sometimes go look up my past tests.