Now the speed test of the TXT Controller via I2C readout.
All results are displayed on the PC monitor. Images are optimal for a UHD screen 3940x2160 pixels. 32 bytes of data are read out. If you leave the device open, all 32 bytes will be read without interruption. The total time for this is 770 usec. The test program has been written to investigate how fast new data can be read from the I2C bus. At the same time, all results are displayed on the screen. The TXT controller must convert all values to the display format and display them.
As a test I use:
16 FT Motors with speed setting, direction and enable visualization. 4 of these motors have an encoder counter whose value is displayed on the screen (is not a restriction and can be further expanded). The speed is adjustable between 0 and 100 for each motor. This speed is also shown on the display. There is provision for 16 servo motors (32 are available in the hardware) in which the position status is read out, left or right. This is also displayed on the screen. Finally, there are 16 inputs that are also displayed (they may be extended to any number).
Note that you can also switch between 8 and 16 bit data with an open device. If the slave is able to answer this number correctly, everything will be processed as a series without waiting loops. This greatly increases the transfer speed of the 32 bytes. The test indicates that there are 438 burst reads per second. The PC display shows the correct results during the tests.
A few pictures:
![Bild](https://farm1.staticflickr.com/962/41950724482_f716d45a06_b.jpg)
Flickr link: https://www.flickr.com/photos/fotoopa_hs/41950724482
The timing of an optimal burst read:
![Bild](https://farm1.staticflickr.com/953/28123464158_d3948a5701_b.jpg)
Flickr link: https://www.flickr.com/photos/fotoopa_hs/28123464158
Test program:
![Bild](https://farm1.staticflickr.com/904/28123465048_04f73c9e79_b.jpg)
Flickr link: https://www.flickr.com/photos/fotoopa_hs/28123465048
![Bild](https://farm1.staticflickr.com/968/41994869511_19c3b203e3_b.jpg)
Flickr : https://www.flickr.com/photos/fotoopa_hs/41994869511
If you want to work with a closed devive now, there will always be an interval between reading the separate data. This makes the reading speed considerably slower. We now obtain an average of 28 refresch cycles instead of 438 / sec. You see the hardware of the I2C device determines your result.
Here are the two results:
![Bild](https://farm1.staticflickr.com/945/41994869821_0178a8434a_b.jpg)
Flickr : https://www.flickr.com/photos/fotoopa_hs/41994869821
The I2C slave driver I wrote for my FPGA can process both single and multiple bytes without additional clock delays. It automatically detects if the TXT wants more data at once. It also supports 8 and 16 bits. That's why 32 bytes of read with a mixed data length of 8 and 16 bits takes only 770 usec ( (32 byte data + 2x address) * 9 bit = 765 usec @ 400 KHz) with an open I2C device except the last access.
The display is updated less quickly than reading the I2C. Nevertheless, this is going quite fast. I tested the 4 encoder counters which increases 15 counts/sec and this ensures a smooth reading on the PC. However, I do not yet know very well how to have proper control over this.
Frans.